Hybrid 8-bit digital-to-analog converter for mobile active matrix flat panel displays using low-temperature polycrystalline silicon thin film transistors
DC Field | Value | Language |
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dc.contributor.author | Byun, Chun Won | - |
dc.contributor.author | Choi, Byong Deok | - |
dc.date.accessioned | 2022-12-21T09:02:35Z | - |
dc.date.available | 2022-12-21T09:02:35Z | - |
dc.date.created | 2022-08-26 | - |
dc.date.issued | 2007-03 | - |
dc.identifier.issn | 0021-4922 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/180403 | - |
dc.description.abstract | To implement a compact-area 8-bit digital-to-analog convener (DAC) for system-on-panel (SoP) application, a panel DAC concept is proposed to apply a cyclic DAC to low-temperature polycrystalline silicon (LTPS) thin film transistor (TFT) driver circuits, which utilizes a pair of data lines as capacitors for the cyclic DAC. This means that a large part of the DAC circuit is implemented on the pixel area, thus saving the peripheral circuit area for the DAC. Another important impact of the proposed scheme is that we can eliminate the buffer amplifier to drive the capacitive data lines, because the analog voltage of the DAC is produced on the data line itself. However, the capacitances of two data lines should match with a 1% difference for the 8-bit cyclic DAC. The data line capacitance is basically parasitic and is fabricated by wet etching, so such tight matching is almost impossible. Therefore, the use of the hybrid DAC which combines a 6-bit resistor-string DAC and a 2-bit cyclic DAC is a more feasible approach, because the capacitance difference of up to 50% between the two data lines is allowed for the 2-bit cyclic DAC. The area increase in the 8-bit hybrid DAC is limited to 21% compared with that in the 6-bit resistor-string DAC, and the power consumption is about 13.3 mW for a 2-in. quarter video graphic array (qVGA) active matrix organic light emitting diode (AMOLED) panel. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | JAPAN SOC APPLIED PHYSICS | - |
dc.title | Hybrid 8-bit digital-to-analog converter for mobile active matrix flat panel displays using low-temperature polycrystalline silicon thin film transistors | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Choi, Byong Deok | - |
dc.identifier.doi | 10.1143/JJAP.46.1380 | - |
dc.identifier.scopusid | 2-s2.0-34547885433 | - |
dc.identifier.wosid | 000247049900029 | - |
dc.identifier.bibliographicCitation | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, v.46, no.3B, pp.1380 - 1386 | - |
dc.relation.isPartOf | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | - |
dc.citation.title | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | - |
dc.citation.volume | 46 | - |
dc.citation.number | 3B | - |
dc.citation.startPage | 1380 | - |
dc.citation.endPage | 1386 | - |
dc.type.rims | ART | - |
dc.type.docType | Article; Proceedings Paper | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordAuthor | DAC | - |
dc.subject.keywordAuthor | driver circuit | - |
dc.subject.keywordAuthor | active matrix display | - |
dc.subject.keywordAuthor | poly-si TFT | - |
dc.identifier.url | https://iopscience.iop.org/article/10.1143/JJAP.46.1380 | - |
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