SONA: An on-chip network for scalable interconnection of AMBA-based IPs

Abstract

Many recent SoCs use one or more busses to provide internal communication paths among integrated IP cores. As the number of cores in a SoC increases, however, the non-scalable communication bandwidth of bus tends to become a bottleneck to achieve high performance. In this paper, we present a scalable switch-based on-chip network, called SONA, which can be used to provide communication paths among existing AMBA-based IP cores. The network interfaces and routers for the on-chip network are modeled in register transfer level and simulated to measure the performance in latency. The simulation results indicate that the proposed on-chip network can be used to provide scalable communication infrastructure for AMBA-based IP cores with a reasonable cost.