Achieving low write latency through new stealth program operation supporting early write completion in NAND flash memory
- Authors
- Jang, Moonseok; Wang, Kexin; Lee, Sangjin; Jeong, Hyeonggyu; Song, Inyeong; Song, Yong Ho; Choi, Jungwook
- Issue Date
- Dec-2022
- Publisher
- ELSEVIER
- Keywords
- NAND flash memory; Page register; NAND cell operation; Solid-state drive
- Citation
- JOURNAL OF SYSTEMS ARCHITECTURE, v.133, pp.1 - 14
- Indexed
- SCIE
SCOPUS
- Journal Title
- JOURNAL OF SYSTEMS ARCHITECTURE
- Volume
- 133
- Start Page
- 1
- End Page
- 14
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/185221
- DOI
- 10.1016/j.sysarc.2022.102767
- ISSN
- 1383-7621
- Abstract
- As the number of bits stored in each flash memory cell increases, the program time of the flash memory increases. Flash memory-based storage uses a high-performance memory as a buffer to overcome the slow write speed of the flash memory. However, because the program time of the flash memory is included in the time taken to avail free space in the data buffer (i.e., dirty eviction), the program time is still one of the leading causes of an increase in the write latency. In this paper, we propose the stealth program operation that supports early write completion to hide the program time of the flash memory. The flash memory stores the data to be programmed in the page register before starting the cell program. The stealth programs report completion immediately after the data are saved to the page register inside the flash memory. In addition, the stealth program is designed to cope with the failure of flash cell programming by allowing the data stored in the page register to be sent back to the memory of the upper layer. The results demonstrate that the average write latency of the solid-state drive can be reduced by up to 95.88%.
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