Impact of Grain Length and Grain Boundary on Dispersion of Threshold Voltage for 3-Dimensional Gate-All-Around Polysilicon Channel Memory

Abstract

Using simulations, we investigated the impact of grain physical parameters in a poly-silicon channel on the dispersion of cell threshold voltages in a gate-all-around channel structure, which is used in 3-dimensional NAND flash memory. Here, cell characteristics were evaluated for various grain length (L-G) and grain boundary trap density (N-GB) values. The dispersion of the threshold voltages was investigated as a function of these parameters in a string with 12 cells. We confirmed that a shorter grain length and higher grain boundary trap density in a poly-silicon vertical channel resulted in poor cell characteristics, namely a lower cell current and a less favorable sub-threshold slope. In addition, we showed that the variations in cell characteristics in a string significantly increased with decreasing grain length and increased trap density in the poly-silicon channel. From these results, we expect that increasing the grain length and minimizing the grain boundary trap density are important methods of decreasing the dispersion of the cell threshold voltages in a string.