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Mechanism of External Stress Instability in Plasma-Enhanced ALD-Derived HfO2/IGZO Thin-Film Transistors

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dc.contributor.author최철희-
dc.contributor.author김태규-
dc.contributor.author김민재-
dc.contributor.authorYoon, Seong Hun-
dc.contributor.authorJeong, Jae Kyeong-
dc.date.accessioned2023-06-01T07:22:36Z-
dc.date.available2023-06-01T07:22:36Z-
dc.date.issued2023-05-
dc.identifier.issn0018-9383-
dc.identifier.issn1557-9646-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/186034-
dc.description.abstractIn this article, the mechanism of stability in amorphous indium-gallium-zinc oxide ( a -IGZO) thin-film transistors (TFTs) with a natural length of ∼ 8 nm was investigated from the perspective of hafnium oxide (HfO 2) gate dielectric point defects. The point defects in HfO2 responded to external stresses such as electric field ( E) and temperature. In particular, oxygen vacancies and the positively charged defects caused an abnormal negative shift in threshold voltage ( VTH) under positive gate bias temperature stress (PBTS). Therefore, reducing the positively charged defects was important to eliminate the abnormal behavior. Inserting a 0.7-nm-thick ultrathin SiO2 interlayer between a -IGZO and optimized HfO2 further improved device performance including stability. Consequently, the resultant a -IGZO TFT exhibited promising device performance with μFE of 22.3 ±0.5 cm 2V−1s−1 , subthreshold swing (SS) of 64 ±0.5 mVdec −1 , hysteresis of 4 mV, and ΔVTH of 124 mV under harsh PBTS with E of 4 MV/cm at 80 °C for 3600 s.-
dc.format.extent7-
dc.language영어-
dc.language.isoENG-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.titleMechanism of External Stress Instability in Plasma-Enhanced ALD-Derived HfO2/IGZO Thin-Film Transistors-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1109/TED.2023.3261281-
dc.identifier.scopusid2-s2.0-85153375696-
dc.identifier.wosid000967410800001-
dc.identifier.bibliographicCitationIEEE Transactions on Electron Devices, v.70, no.5, pp 2317 - 2323-
dc.citation.titleIEEE Transactions on Electron Devices-
dc.citation.volume70-
dc.citation.number5-
dc.citation.startPage2317-
dc.citation.endPage2323-
dc.type.docTypeArticle; Early Access-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.subject.keywordPlusTIN-OXIDE TRANSISTORS-
dc.subject.keywordPlusATOMIC-LAYER-
dc.subject.keywordPlusLOW-VOLTAGE-
dc.subject.keywordPlusGATE INSULATOR-
dc.subject.keywordPlusPERFORMANCE-
dc.subject.keywordPlusCHANNEL-
dc.subject.keywordPlusTEMPERATURE-
dc.subject.keywordPlusDIELECTRICS-
dc.subject.keywordPlusTHICKNESS-
dc.subject.keywordPlusOXYGEN-
dc.subject.keywordAuthorAmorphous indium gallium zinc oxide (a-IGZO)-
dc.subject.keywordAuthorhafnium oxide (HfO2)-
dc.subject.keywordAuthorplasma-enhanced atomic layer deposition (PEALD)-
dc.subject.keywordAuthorpositive gate bias temperature stability (PBTS)-
dc.subject.keywordAuthorthin-film transistors (TFTs)-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/10091204-
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