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Simulation of a Recessed Channel Ferroelectric-Gate Field-Effect Transistor with a Dual Ferroelectric Gate Stack for Memory Application

Authors
김영현
Issue Date
15-Feb-2023
Publisher
한국반도체산업협회/연구조합
Citation
한국반도체학술대회
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/187871
Conference Name
한국반도체학술대회
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