Noise-Reduced and PVT-Robust Double-Balanced CMOS Mixer Using Common-Mode Feedbackopen access
- Authors
- Lim, Chang-Woo; Lee, Ji-Young; Kim, Myoung-Gyun; Yun, Tae-Yeoul
- Issue Date
- Jun-2023
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- CMOS mixer; common-mode feedback; flicker noise; white noise
- Citation
- IEEE ACCESS, v.11, pp.64713 - 64724
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE ACCESS
- Volume
- 11
- Start Page
- 64713
- End Page
- 64724
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/188381
- DOI
- 10.1109/ACCESS.2023.3289553
- ISSN
- 2169-3536
- Abstract
- This paper presents a noise reduction technique using common-mode feedback in active CMOS mixers. The proposed technique decreases the common-mode noise, thus reducing the common-to-differential conversion noise arising from mismatch and process variations. In addition, the proposed technique reduces sensitivity to process, voltage, and temperature (PVT) variations due to negative feedback. A negative feedback theory is adopted to analyze the low-noise performance of the proposed technique. The theoretical analysis is validated by simulations and measurements. The conventional and proposed mixers are fabricated in a 65-nm CMOS process. Measurement results of the proposed mixer operating at an RF of 2.1 GHz show a conversion gain of 21.5 dB, the input-referred third-order intercept point (IIP3) of -16.2 dBm, and a flicker noise figure of 8.7 dB at 10 kHz while it dissipates 3.45 mW from a 1.5 V supply voltage. Measurements also show common-mode noise reduction of 10.1 dB at 10 kHz, without degradation of other characteristics. It is demonstrated that the proposed mixer can be applied to decrease phase noise of a self-oscillating mixer (SOM) due to the low common-mode flicker noise mixer.
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