Dataflow에 따른 Systolic Array의 연산 성능 분석
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 위대은 | - |
dc.contributor.author | 박상수 | - |
dc.contributor.author | 정기석 | - |
dc.date.accessioned | 2023-08-01T06:53:16Z | - |
dc.date.available | 2023-08-01T06:53:16Z | - |
dc.date.created | 2023-07-21 | - |
dc.date.issued | 2022-11 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/188561 | - |
dc.description.abstract | Today, Deep Neural Networks (DNNs) have been widely used for various applications. Because the DNNs require a large amount of computation, hardware accelerators are commonly used to speed up the inference processing. In the systolic array architecture, a common hardware structure for neural network accelerators, the type of dataflow defines how data is stored in a processing element (PE) and exchanged among adjacent PEs. The computing performance of the systolic array differs depending on the type of the dataflows. Therefore, data flow analysis is crucial to maximize the inference performance. In this work, the computing performance depending on the data flows is evaluated using an open-source systolic array simulator called SCALE-Sim, Experimental results show that the inference latency differs up to 3.2 times depending on the type of the dataflow. | - |
dc.language | 한국어 | - |
dc.language.iso | ko | - |
dc.publisher | 대한임베디드공학회 | - |
dc.title | Dataflow에 따른 Systolic Array의 연산 성능 분석 | - |
dc.title.alternative | Analysis of Computing Performance of Systolic Arrays depending on Dataflows | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | 정기석 | - |
dc.identifier.bibliographicCitation | 2022 대한임베디드공학회 추계학술대회, v.0, no.0, pp.55 - 58 | - |
dc.relation.isPartOf | 2022 대한임베디드공학회 추계학술대회 | - |
dc.citation.title | 2022 대한임베디드공학회 추계학술대회 | - |
dc.citation.volume | 0 | - |
dc.citation.number | 0 | - |
dc.citation.startPage | 55 | - |
dc.citation.endPage | 58 | - |
dc.type.rims | ART | - |
dc.type.docType | Proceeding | - |
dc.description.journalClass | 3 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | other | - |
dc.subject.keywordAuthor | Convolution neural network | - |
dc.subject.keywordAuthor | Systolic array | - |
dc.subject.keywordAuthor | Dataflow, Weight stationary | - |
dc.subject.keywordAuthor | Output stationary | - |
dc.subject.keywordAuthor | Compute cycles | - |
dc.subject.keywordAuthor | etc. | - |
dc.identifier.url | http://esoc.hanyang.ac.kr/publications/2022/Dataflow%EC%97%90%20%EB%94%B0%EB%A5%B8%20Systolic%20Array%EC%9D%98%20%EC%97%B0%EC%82%B0%20%EC%84%B1%EB%8A%A5%20%EB%B6%84%EC%84%9D.pdf | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
222, Wangsimni-ro, Seongdong-gu, Seoul, 04763, Korea+82-2-2220-1365
COPYRIGHT © 2021 HANYANG UNIVERSITY.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.