Gate-Normal negative capacitance tunnel field-effect transistor (TFET) with channel doping engineering
DC Field | Value | Language |
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dc.contributor.author | Kim, Hyun Woo | - |
dc.contributor.author | Kwon, Daewoong | - |
dc.date.accessioned | 2023-09-11T01:43:47Z | - |
dc.date.available | 2023-09-11T01:43:47Z | - |
dc.date.created | 2023-07-21 | - |
dc.date.issued | 2021-03 | - |
dc.identifier.issn | 1536-125X | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/190327 | - |
dc.description.abstract | In this work, a negative capacitance tunnel FET (NCTFET) with the tunneling current in the normal direction to the gate is proposed with channel doping engineering and its electrical characteristics are investigated using TCAD simulations with calibrated model parameters. The new NCTFET has a p(+)-doping (for n-type operations) in the channel overlap region, which plays a role to suppress the corner (source edge) band-to-band tunneling (BTBT) that degrades the on/off transition. By optimizing the doping concentration of the channel overlap region (N-CH,N-OV), the on-current gets similar to 3.5 times enhanced and the averaged subthreshold swing (SSAVE) becomes reduced from 82.5 mV/dec to 43.9 mV/dec. Furthermore, the effects of epi-channel thickness (T-CH) and source overlap length (L-S,L-OV) variations are analyzed by simulating 2D contour BTBT generation rates and electron densities. With the optimized device parameters (4 nm T-CH and 35 nm L-S,L-OV), the on-current is additionally similar to 1.6 times improved without the SS and the ambipolar current degradations. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Gate-Normal negative capacitance tunnel field-effect transistor (TFET) with channel doping engineering | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kwon, Daewoong | - |
dc.identifier.doi | 10.1109/TNANO.2021.3068572 | - |
dc.identifier.scopusid | 2-s2.0-85103242167 | - |
dc.identifier.wosid | 000641958500002 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON NANOTECHNOLOGY, v.20, pp.278 - 281 | - |
dc.relation.isPartOf | IEEE TRANSACTIONS ON NANOTECHNOLOGY | - |
dc.citation.title | IEEE TRANSACTIONS ON NANOTECHNOLOGY | - |
dc.citation.volume | 20 | - |
dc.citation.startPage | 278 | - |
dc.citation.endPage | 281 | - |
dc.type.rims | ART | - |
dc.type.docType | 정기학술지(Article(Perspective Article포함)) | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Science & Technology - Other Topics | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Nanoscience & Nanotechnology | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | LOW-POWER | - |
dc.subject.keywordPlus | FET | - |
dc.subject.keywordAuthor | Logic gates | - |
dc.subject.keywordAuthor | Tunneling | - |
dc.subject.keywordAuthor | TFETs | - |
dc.subject.keywordAuthor | Doping | - |
dc.subject.keywordAuthor | Capacitance | - |
dc.subject.keywordAuthor | Semiconductor process modeling | - |
dc.subject.keywordAuthor | Iron | - |
dc.subject.keywordAuthor | Band-to-band tunneling (BTBT) | - |
dc.subject.keywordAuthor | gate-normal tunnel FET | - |
dc.subject.keywordAuthor | landau-khalatnikov (LK) model | - |
dc.subject.keywordAuthor | corner BTBT | - |
dc.subject.keywordAuthor | subthreshold swing (SS) | - |
dc.subject.keywordAuthor | line tunneling | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/9385857 | - |
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