Volatile and Nonvolatile Characteristics of Asymmetric Dual-Gate Thyristor RAM with Vertical Structure
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Hyun-Min | - |
dc.contributor.author | Kwon, Dae Woong | - |
dc.contributor.author | Kim, Sihyun | - |
dc.contributor.author | Lee, Kitae | - |
dc.contributor.author | Lee, Junil | - |
dc.contributor.author | Park, Euyhwan | - |
dc.contributor.author | Lee, Ryoongbin | - |
dc.contributor.author | Kim, Hyungjin | - |
dc.contributor.author | Kim, Sangwan | - |
dc.contributor.author | Park, Byung-Gook | - |
dc.date.accessioned | 2023-09-18T07:14:36Z | - |
dc.date.available | 2023-09-18T07:14:36Z | - |
dc.date.created | 2023-07-07 | - |
dc.date.issued | 2018-09 | - |
dc.identifier.issn | 1533-4880 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/190943 | - |
dc.description.abstract | In this paper, the volatile and nonvolatile characteristics of asymmetric dual-gate thyristor random access memory (TRAM) are investigated using the technology of a computer-aided design (TCAD) simulation. Owing to the use of two independent gates having different gate dielectric layers, volatile and nonvolatile memory functions can be realized in a single device. The first gate with a silicon oxide layer controls the one-transistor dynamic random access memory (1T-DRAM) characteristics of the device. From the simulation results, a rapid write speed (<8 ns) and a large on-off current ratio (> 10(7) ) can be achieved. The second gate, whose dielectric material is composed of oxide/nitride/oxide (O/N/O) layers, is used to implement the nonvolatile property by trapping charges in the nitride layer. In addition, this offers an advantage when processing the 3D-stack memory application, as the device has a vertical channel structure with polycrystalline silicon. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | AMER SCIENTIFIC PUBLISHERS | - |
dc.title | Volatile and Nonvolatile Characteristics of Asymmetric Dual-Gate Thyristor RAM with Vertical Structure | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kwon, Dae Woong | - |
dc.identifier.doi | 10.1166/jnn.2018.15570 | - |
dc.identifier.wosid | 000430706900005 | - |
dc.identifier.bibliographicCitation | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.18, no.9, pp.5882 - 5886 | - |
dc.relation.isPartOf | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY | - |
dc.citation.title | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY | - |
dc.citation.volume | 18 | - |
dc.citation.number | 9 | - |
dc.citation.startPage | 5882 | - |
dc.citation.endPage | 5886 | - |
dc.type.rims | ART | - |
dc.type.docType | 정기학술지(Article(Perspective Article포함)) | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.relation.journalResearchArea | Chemistry | - |
dc.relation.journalResearchArea | Science & Technology - Other Topics | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Chemistry, Multidisciplinary | - |
dc.relation.journalWebOfScienceCategory | Nanoscience & Nanotechnology | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.relation.journalWebOfScienceCategory | Physics, Condensed Matter | - |
dc.subject.keywordPlus | CAPACITORLESS 1T-DRAM | - |
dc.subject.keywordPlus | 1T DRAM | - |
dc.subject.keywordPlus | MEMORY | - |
dc.subject.keywordPlus | OPERATION | - |
dc.subject.keywordPlus | MOSFET | - |
dc.subject.keywordPlus | CELLS | - |
dc.subject.keywordPlus | URAM | - |
dc.subject.keywordAuthor | 1T-DRAM | - |
dc.subject.keywordAuthor | Capacitor-Less DRAM | - |
dc.subject.keywordAuthor | Thyristor | - |
dc.subject.keywordAuthor | Dual-Gate | - |
dc.identifier.url | https://www.ingentaconnect.com/content/asp/jnn/2018/00000018/00000009/art00005;jsessionid=6rkq7qs7qun7n.x-ic-live-01 | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
222, Wangsimni-ro, Seongdong-gu, Seoul, 04763, Korea+82-2-2220-1365
COPYRIGHT © 2021 HANYANG UNIVERSITY.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.