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A Nitrided Interfacial Oxide for Interface State Improvement in Hafnium Zirconium Oxide-Based Ferroelectric Transistor Technology

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dc.contributor.authorTan, Ava J.-
dc.contributor.authorYadav, Ajay K.-
dc.contributor.authorChatterjee, Korok-
dc.contributor.authorKwon, Daewoong-
dc.contributor.authorKim, Sangwan-
dc.contributor.authorHu, Chenming-
dc.contributor.authorSalahuddin, Sayeef-
dc.date.accessioned2023-11-14T08:49:35Z-
dc.date.available2023-11-14T08:49:35Z-
dc.date.created2023-07-07-
dc.date.issued2017-11-
dc.identifier.issn0741-3106-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/192404-
dc.description.abstractWe examine the nature of the interface states induced during the integration of ferroelectric hafnium zirconium oxide on silicon. Metal-ferroelectric-insulator-silicon capacitors, with a thin layer of hafnium zirconium oxide grown by atomic layer deposition as the ferroelectric and various interfacial oxide layers as the insulator, are investigated. Since a high-temperature post-annealing is necessary to induce the formation of the ferroelectric phase in this oxide stack, the integrity of the oxide/silicon interface must be preserved after high-temperature processing. As such, we show that a nitrided interlayer provides an improved midgap interface state density among all interfacial oxides investigated. Furthermore, we quantify the interface states using the ac conductance technique and model the interface trap distribution across the silicon bandgap in order to explain and verify the experimental measurements.-
dc.language영어-
dc.language.isoen-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleA Nitrided Interfacial Oxide for Interface State Improvement in Hafnium Zirconium Oxide-Based Ferroelectric Transistor Technology-
dc.typeArticle-
dc.contributor.affiliatedAuthorKwon, Daewoong-
dc.identifier.doi10.1109/LED.2017.2772791-
dc.identifier.scopusid2-s2.0-85034617983-
dc.identifier.wosid000418874200024-
dc.identifier.bibliographicCitationIEEE ELECTRON DEVICE LETTERS, v.39, no.1, pp.95 - 98-
dc.relation.isPartOfIEEE ELECTRON DEVICE LETTERS-
dc.citation.titleIEEE ELECTRON DEVICE LETTERS-
dc.citation.volume39-
dc.citation.number1-
dc.citation.startPage95-
dc.citation.endPage98-
dc.type.rimsART-
dc.type.docType정기 학술지(letter(letters to the editor))-
dc.description.journalClass1-
dc.description.isOpenAccessY-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusSI-SIO2 INTERFACE-
dc.subject.keywordPlusTRAPS-
dc.subject.keywordPlusCAPACITANCE-
dc.subject.keywordPlusDEVICES-
dc.subject.keywordPlusFILMS-
dc.subject.keywordPlusHFO2-
dc.subject.keywordPlusZRO2-
dc.subject.keywordAuthorFerroelectrics-
dc.subject.keywordAuthorhafnium zirconium oxide-
dc.subject.keywordAuthorhigh-k dielectrics-
dc.subject.keywordAuthorinterface traps-
dc.subject.keywordAuthorac conductance-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8105806-
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