A Wide-Dynamic-Range Optical Receiver Using an Input Overload Compensation Circuit
- Authors
- Lim, Chang-Woo; Park, Jun-Young; Lee, Ji-Young; Park, Moon Soo; Yun, Tae-Yeoul
- Issue Date
- Jan-2024
- Publisher
- Institute of Electrical and Electronics Engineers
- Keywords
- 10-Gb/s optical receiver; Bandwidth; BiCMOS integrated circuits; Gain; Optical fiber amplifiers; Optical receivers; overload; PON; Silicon germanium; Temperature measurement; TIA; transimpedance amplifier
- Citation
- IEEE Photonics Technology Letters, v.36, no.1, pp 27 - 30
- Pages
- 4
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE Photonics Technology Letters
- Volume
- 36
- Number
- 1
- Start Page
- 27
- End Page
- 30
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/193279
- DOI
- 10.1109/LPT.2023.3334731
- ISSN
- 1041-1135
1941-0174
- Abstract
- A wide-dynamic-range 10-Gb/s optical receiver is proposed in a transistor outlook (TO)-can module with a p-i-n photodiode (PIN-PD), a transimpedance amplifier (TIA), a limiting amplifier (LA), and an input overload compensation circuit (IOCC). The simple IOCC improves the input overload current performance using a Wilson current mirror. The LA enables high gain and wide bandwidth by adopting a conventional Cherry–Hooper structure. Measurements showed a transimpedance gain of 96 dBΩ and a 3-dB bandwidth from 30 kHz to 8.9 GHz with a PIN-PD of 0.25-pF parasitic capacitance and 0.8 A/W responsivity. The dynamic range was from -21.8 to +3.7 dBm with a bit-error-rate of 10-12 and a pseudo-random binary sequence of 231 – 1. The core chip was fabricated with a 0.13-μm SiGe BiCMOS technology. The power dissipation was 98 mW from a 3.3-V supply, and the die area was 1.0 × 0.8 mm2.
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