Monolithically Integrated Complementary Ferroelectric FET XNOR Synapse for the Binary Neural Network

Abstract

Neuromorphic computing, which mimics the structure and principles of the human brain, has the potential to facilitate the hardware implementation of next-generation artificial intelligence systems and process large amounts of data with very low power consumption. Among them, the XNOR synapse-based Binary Neural Network (BNN) has been attracting attention due to its compact neural network parameter size and low hardware cost. The previous XNOR synapse has drawbacks, such as a trade-off between cell density and accuracy. In this work, we show nonvolatile XNOR synapses with high density and accuracy using a monolithically stacked complementary ferroelectric field-effect transistor (C-FeFET) composed of a p-type Si MFMIS-FeFET at the bottom and a 3D stackable n-type Al:IZTO MFS-FeTFT, achieving 60F2 per cell (2C-FeFET). For adjusting the threshold voltage and improving the switching speed (100 ns) of n-type ferroelectric TFT, we employed a dual-gate configuration and a unique operation scheme, making it comparable to those of Si-based FeFETs. We performed array-level simulation with a 512 × 512 subarray size and a 3-bit flash ADC, demonstrating that the image recognition accuracies using the MNIST and CIFAR-10 data sets were increased by 3.17 and 14.07%, respectively, in comparison to other nonvolatile XNOR synapses. In addition, we performed system-level analysis on a 512 × 512 XNOR C-FeFET, exhibiting an outstanding throughput of 717.37 GOPS and an energy efficiency of 196.7 TOPS/W. We expect that our approach would contribute to the high-density memory systems, logic-in-memory technology, and hardware implementation of neural networks.