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Comprehensive analysis of read-after-write latency in HfZrOX-based ferroelectric field-effect-transistors with SiO2 interfacial layer

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dc.contributor.authorKim, Haesung-
dc.contributor.authorYang, Hyojin-
dc.contributor.authorLee, Seongwon-
dc.contributor.authorYun, Sanghyuk-
dc.contributor.authorPark, Junseong-
dc.contributor.authorPark, Sejun-
dc.contributor.authorLee, Ha-Neul-
dc.contributor.authorKim, Hyeonsik-
dc.contributor.authorChoi, Sung-Jin-
dc.contributor.authorKim, Dae Hwan-
dc.contributor.authorKim, Dong Myong-
dc.contributor.authorKwon, Daewoong-
dc.contributor.authorBae, Jong-Ho-
dc.date.accessioned2024-11-28T14:01:38Z-
dc.date.available2024-11-28T14:01:38Z-
dc.date.issued2024-01-
dc.identifier.issn0003-6951-
dc.identifier.issn1077-3118-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/196781-
dc.description.abstractIn this paper, a quantitative analysis is performed focusing on the read-after-write latency (RWL) phenomenon in HfOX-based ferroelectric field-effect transistors with a metal-ferroelectric-insulator-semiconductor structure. RWL is scrutinized by modifying two variables: the pulse width (tp) for the “write 1” operation and the operating temperature (T); the response of the charge component is found to follow an emission mechanism. Additionally, we identified a notable change in charge behavior at a specific temperature (Tb), where capture and emission are in balance. Experimental investigations have demonstrated that the activation energy (EA) for these charge components is situated between 0.2 and 0.5 eV, and the Tb is ∼50 °C. By elucidating the relationship between T, tp, remnant polarization (Pr), and Tb, we offer insights into the importance of optimizing tp and Pr on the transient response of the balanced charge and the related RWL phenomenon.-
dc.format.extent7-
dc.language영어-
dc.language.isoENG-
dc.publisherAmerican Institute of Physics-
dc.titleComprehensive analysis of read-after-write latency in HfZrOX-based ferroelectric field-effect-transistors with SiO2 interfacial layer-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1063/5.0172204-
dc.identifier.scopusid2-s2.0-85182724578-
dc.identifier.wosid001144920500004-
dc.identifier.bibliographicCitationApplied Physics Letters, v.124, no.3, pp 1 - 7-
dc.citation.titleApplied Physics Letters-
dc.citation.volume124-
dc.citation.number3-
dc.citation.startPage1-
dc.citation.endPage7-
dc.type.docTypeArticle-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.subject.keywordPlusGATE-
dc.subject.keywordPlusFET-
dc.subject.keywordPlusZRO2-
dc.identifier.urlhttps://pubs.aip.org/aip/apl/article/124/3/033503/3022989/Comprehensive-analysis-of-read-after-write-latency-
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