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Suppressed charge trapping characteristics of (NH₄)₂Sx passivated GaN MOS device with atomic layer deposited HfAlOx gate dielectric

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dc.contributor.authorHan, Hoon Hee-
dc.contributor.authorLim, Donghwan-
dc.contributor.authorSergeevich, Andrey Sokolov-
dc.contributor.authorJeon, Yu-Rim-
dc.contributor.authorLee, Jae Ho-
dc.contributor.authorSon, Seok Ki-
dc.contributor.authorChoi, Changhwan-
dc.date.accessioned2021-08-02T14:55:35Z-
dc.date.available2021-08-02T14:55:35Z-
dc.date.issued2017-06-
dc.identifier.issn0167-9317-
dc.identifier.issn1873-5568-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/19689-
dc.description.abstractThe charge trapping behaviors of ammonium poly-sulfide,(NH4)(2)S-x.,passivated GaN MOS device with atomic layer deposited HfAlOx. gate dielectric and DC-sputtered TiN gate electrode are investigated and compared with those of GaN MOS device with hydrochloric acid, HCI, passivation. Compared to non-S passivated device, higher peak capacitance (>20% @1 MHz), reduced frequency dispersion (similar to 30% down arrow) lower hysteresis (similar to 34% down arrow), higher breakdown (1.3x), lower stress induced flat-band voltage (V-FB) shift (similar to 30% down arrow), and lower interface state density (D-it) stronger immunity D-it generation (Delta D-it) against gate bias voltage are attained with S-passivated device. Further improved characteristics are observed with post deposition annealing at 400 degrees C for 10 min. These behaviors are mainly attributed to higher bond strength energy of S-O and S-N than those of CI-O and Cl-N bonds.-
dc.format.extent5-
dc.language영어-
dc.language.isoENG-
dc.publisherElsevier BV-
dc.titleSuppressed charge trapping characteristics of (NH₄)₂Sx passivated GaN MOS device with atomic layer deposited HfAlOx gate dielectric-
dc.title.alternativeSuppressed charge trapping characteristics of (NH4)(2)S-x passivated GaN MOS device with atomic layer deposited HfAlOx gate dielectric-
dc.typeArticle-
dc.publisher.location네델란드-
dc.identifier.doi10.1016/j.mee.2017.05.027-
dc.identifier.scopusid2-s2.0-85019575333-
dc.identifier.wosid000404703800055-
dc.identifier.bibliographicCitationMicroelectronic Engineering, v.178, pp 240 - 244-
dc.citation.titleMicroelectronic Engineering-
dc.citation.volume178-
dc.citation.startPage240-
dc.citation.endPage244-
dc.type.docTypeArticle; Proceedings Paper-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClasssci-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaScience & Technology - Other Topics-
dc.relation.journalResearchAreaOptics-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryNanoscience & Nanotechnology-
dc.relation.journalWebOfScienceCategoryOptics-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.subject.keywordPlusSULFIDE PASSIVATION-
dc.subject.keywordPlusSURFACE-
dc.subject.keywordAuthorSulfur passivation-
dc.subject.keywordAuthorInterface trap density-
dc.subject.keywordAuthorCharge trapping-
dc.subject.keywordAuthorGaN device-
dc.identifier.urlhttps://www.sciencedirect.com/science/article/pii/S0167931717302241?via%3Dihub-
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