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Hiding rollback latency in log-based eager hardware transactional memory

Authors
Lee, SungjaeLee, Inhwan
Issue Date
Jan-2014
Publisher
Institute of Electrical Engineers
Citation
Electronics Letters, v.50, no.2, pp 72 - 73
Pages
2
Indexed
SCI
SCIE
SCOPUS
Journal Title
Electronics Letters
Volume
50
Number
2
Start Page
72
End Page
73
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/202924
DOI
10.1049/el.2013.3133
ISSN
0013-5194
1350-911X
Abstract
The use of a rollback buffer (RB) for hiding the rollback latency in log-based eager hardware transactional memory is proposed. The RB allows a transaction to abort without performing rollback, but still makes the transaction's old values immediately available. In effect, the rollback latency almost disappears. When running the Stanford transactional applications for multi-processing benchmark on a 16-core processor that implements the LogTM-SE, the speedup (decrease in execution time) achieved with a 2 KB RB is 15.8% on average.
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