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Low-Power Encoding for PAM-3 DRAM Bus
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Nam, Jonghyeon | - |
| dc.contributor.author | Han, Jaeduk | - |
| dc.contributor.author | Kim, Hokeun | - |
| dc.date.accessioned | 2025-01-02T09:01:22Z | - |
| dc.date.available | 2025-01-02T09:01:22Z | - |
| dc.date.issued | 2024-07 | - |
| dc.identifier.issn | 2575-4874 | - |
| dc.identifier.issn | 2575-4890 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/204146 | - |
| dc.description.abstract | The 3-level pulse amplitude modulation (PAM-3) signaling is expected to be widely used in memory interfaces for its greater voltage margins compared to PAM-4. To maximize the benefit of PAM-3, we propose three low-power data encoding algorithms: PAM3-DBI, PAM3-MF, and PAM3-SORT. With the DRAM memory traces from the gem5 computer architecture simulator running benchmarks, we evaluate the energy efficiency of our three PAM-3 encoding techniques. The experimental results show the proposed algorithms can reduce termination power for high-speed memory links significantly by 41% to 90% for benchmark programs. | - |
| dc.format.extent | 4 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
| dc.title | Low-Power Encoding for PAM-3 DRAM Bus | - |
| dc.type | Article | - |
| dc.identifier.doi | 10.1109/SMACD61181.2024.10745398 | - |
| dc.identifier.scopusid | 2-s2.0-85211918544 | - |
| dc.identifier.wosid | 001453403300018 | - |
| dc.identifier.bibliographicCitation | Proceedings - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024, pp 1 - 4 | - |
| dc.citation.title | Proceedings - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024 | - |
| dc.citation.startPage | 1 | - |
| dc.citation.endPage | 4 | - |
| dc.type.docType | Proceedings Paper | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.subject.keywordPlus | Associative storage | - |
| dc.subject.keywordPlus | Benchmarking | - |
| dc.subject.keywordPlus | Memory architecture | - |
| dc.subject.keywordPlus | Pulse amplitude modulation | - |
| dc.subject.keywordPlus | Signal encoding | - |
| dc.subject.keywordPlus | Static random access storage | - |
| dc.subject.keywordAuthor | Data encoding | - |
| dc.subject.keywordAuthor | DRAM bus | - |
| dc.subject.keywordAuthor | Low power | - |
| dc.subject.keywordAuthor | PAM-3 | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/10745398 | - |
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