Small VCO-Gain Variation Adding a Bias-Shifted Inversion-Mode MOS Varactor

Abstract

This letter proposes a small voltage-controlled oscillator (VCO)-gain variation (Delta KVCO) technique using the capacitance-slope change of the varactor, which is achieved by adding a bias-shifted inversion-mode MOS varactor in parallel with a conventional accumulation-mode MOS varactor. This technique is investigated via theoretical analysis, which is confirmed by simulation and measurement. The proposed VCO shows a phase noise of -116.4 dBc/Hz at a 1-MHz offset frequency at 2.36 GHz, a figure of merit of -185 dBc/Hz, and a Delta KVCO of less than 8.6% over a frequency tuning range from 1.73 to 2.36 GHz while consuming 0.76 mW from a 0.8-V supply voltage. It was implemented using a 110-nm CMOS process with a chip area of 0.95 mm(2).