Acquisition accuracy enhancement of high-speed storage interface signalsopen access
- Authors
- Kim, Hyunwoo; Song, Yong Ho
- Issue Date
- Apr-2017
- Publisher
- IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
- Keywords
- storage interface; signal acquisition; phase alignment; mobile storage; eMMC; oversampling clock data recovery; acquisition accuracy
- Citation
- IEICE ELECTRONICS EXPRESS, v.14, no.15, pp.1 - 12
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEICE ELECTRONICS EXPRESS
- Volume
- 14
- Number
- 15
- Start Page
- 1
- End Page
- 12
- URI
- https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/20460
- DOI
- 10.1587/elex.14.20170634
- ISSN
- 1349-2543
- Abstract
- As storage interfaces have begun to employ high-speed signals and complex protocols, it has become increasingly difficult to ensure correct interactions between hosts and their storage. Correctness verification often requires the acquisition and thorough inspection of signals running at the interface. However, increases in interface signaling frequency may aggravate misalignment between sampling clocks and signals as well as among multiple signals, rendering signal acquisition and inspection difficult. To address this problem, this paper proposes a dynamic phase alignment scheme that can be used within a signal acquisition system. The proposed scheme was implemented on a Field-Programmable Gate Array (FPGA) board and was verified to successfully capture interface signals.
- Files in This Item
-
- Appears in
Collections - 서울 공과대학 > 서울 융합전자공학부 > 1. Journal Articles
![qrcode](https://api.qrserver.com/v1/create-qr-code/?size=55x55&data=https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/20460)
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.