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Tailoring Crystal Growth via Sn Incorporation for High-Performance ALD IGO FETs

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dc.contributor.authorKim, Gwang-bok-
dc.contributor.authorJeong, Joo-hee-
dc.contributor.authorPark, Soojin-
dc.contributor.authorChoi, Sunghyun-
dc.contributor.authorAn, Jiseong-
dc.contributor.authorPark, Kwangmin-
dc.contributor.authorJeong, Jae Kyeong-
dc.date.accessioned2025-10-28T02:00:08Z-
dc.date.available2025-10-28T02:00:08Z-
dc.date.issued2025-10-
dc.identifier.issn0741-3106-
dc.identifier.issn1558-0563-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/208995-
dc.description.abstractThis study presents high-performance field-effect transistors (FETs) using atomic layer deposition (ALD)-derived Sn-doped oxide semiconductors for back-end-of-line (BEOL)-compatible applications. Optimized Sn incorporation promoted (222) face crystal growth, reducing grain boundary density and enhancing carrier transport. The resulting FET exhibited a high mobility of 79.5 cm2/Vs, a low subthreshold swing of 61.0 mV/dec, and stable enhancement-mode operation. Reliability tests confirmed minimal threshold voltage shifts under external bias temperature stress, demonstrating the potential of ALD-based oxide semiconductors for next-generation memory applications.-
dc.format.extent4-
dc.language영어-
dc.language.isoENG-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.titleTailoring Crystal Growth via Sn Incorporation for High-Performance ALD IGO FETs-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1109/LED.2025.3601554-
dc.identifier.scopusid2-s2.0-105014012354-
dc.identifier.wosid001585567000011-
dc.identifier.bibliographicCitationIEEE Electron Device Letters, v.46, no.10, pp 1781 - 1784-
dc.citation.titleIEEE Electron Device Letters-
dc.citation.volume46-
dc.citation.number10-
dc.citation.startPage1781-
dc.citation.endPage1784-
dc.type.docTypeArticle-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusTRANSISTORS-
dc.subject.keywordAuthorAtomic Layer Deposition-
dc.subject.keywordAuthorCrystallization-
dc.subject.keywordAuthorIndium Gallium Tin Oxide-
dc.subject.keywordAuthorOxide Semiconductor-
dc.subject.keywordAuthorThin-film Transistor-
dc.subject.keywordAuthorField Effect Transistors-
dc.subject.keywordAuthorGallium Compounds-
dc.subject.keywordAuthorGrain Boundaries-
dc.subject.keywordAuthorGrain Growth-
dc.subject.keywordAuthorMos Devices-
dc.subject.keywordAuthorOxide Semiconductors-
dc.subject.keywordAuthorSemiconducting Indium-
dc.subject.keywordAuthorSemiconducting Indium Compounds-
dc.subject.keywordAuthorSemiconducting Tin Compounds-
dc.subject.keywordAuthorThin Film Circuits-
dc.subject.keywordAuthorThreshold Voltage-
dc.subject.keywordAuthorTin Oxides-
dc.subject.keywordAuthorAtomic-layer Deposition-
dc.subject.keywordAuthorBack End Of Lines-
dc.subject.keywordAuthorC. Thin Film Transistor (tft)-
dc.subject.keywordAuthorCarriers Transport-
dc.subject.keywordAuthorDoped Oxides-
dc.subject.keywordAuthorField-effect Transistor-
dc.subject.keywordAuthorGrain Boundary Densities-
dc.subject.keywordAuthorHigh Mobility-
dc.subject.keywordAuthorPerformance-
dc.subject.keywordAuthorSn-doped-
dc.subject.keywordAuthorAtomic Layer Deposition-
dc.subject.keywordAuthorCrystallization-
dc.subject.keywordAuthorThin Film Transistors-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/11134383-
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