Design for Testability of a CMOS Dynamic Bias Comparator for Through-Wafer Two-Photon Absorption Pulsed-Laser Testing

Abstract

Testing integrated circuits (IC) for high radiation environments can be costly, requiring special fabrication processes and booking time at a radiation testing facility. Instead, preliminary testing can be conducted using pulsed-laser testing to simulate the effects of ionizing radiation on an IC. Many different laser testing methods also require additional processes during or after IC fabrication and need specialized test equipment in addition to the laser source. This work examines the cost in die area and losses in maximum clock frequency and energy efficiency caused by placing the burden of laser testing on adding design for testability structures to a dynamic bias comparator IC. The area of each comparator increases by 18,000 μm2, the maximum clock frequency is reduced by a factor of 0.3 to 0.7, and the energy per conversion increases by a factor of 1.4 to 2.25. These costs enable initial radiation testing using a pulsed laser with reduced constraints on optical equipment and no need for specialized fabrication processes.