Template-assisted crystallization for tin halide perovskite transistors

Abstract

Tin (Sn) halide perovskites are promising lead-free semiconductors for next-generation electronics, yet their susceptibility to oxidation, rapid crystallization, and high defect densities hinder their application in high-performance thin-film transistors (TFTs). Here, we present a template-assisted crystallization strategy that enables two-dimensional (2D) metal halide perovskite TFTs—valued for their stability but intrinsically limited by poor charge transport—to achieve performance compatible to that of high-performance three-dimensional (3D) perovskite TFTs. Confinement within periodic nanograting grooves simultaneously enhances crystallinity—thereby suppressing trap formation—and induces near-surface compressive lattice strain that lowers the carrier effective mass. The resulting TFTs achieve a record-high field-effect mobility of 24.08 cm2V−1s−1 among 2D Sn halide perovskites, with on/off ratios exceeding 107, a subthreshold swing of 0.95 V dec−1, and minimal hysteresis. The devices exhibit exceptional operational stability under cyclic bias, prolonged bias stress, and dynamic switching, as well as prolonged air and thermal stability. This work establishes nanoscale crystallization control as a powerful approach for unlocking the performance and stability potential of lead-free perovskite electronics.