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Atomic Layer Etching of SiO2 Utilizing Ultra-Low Electron Temperature Plasma
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Park, Junyoung | - |
| dc.contributor.author | Kim, Nayeon | - |
| dc.contributor.author | Choi, Jung-Eun | - |
| dc.contributor.author | Yeo, Yujin | - |
| dc.contributor.author | Kim, Min-Seok | - |
| dc.contributor.author | Lim, Chang-Min | - |
| dc.contributor.author | Seo, Beom-Jun | - |
| dc.contributor.author | Chung, Chin-Wook | - |
| dc.date.accessioned | 2026-02-02T06:31:16Z | - |
| dc.date.available | 2026-02-02T06:31:16Z | - |
| dc.date.issued | 2025-05 | - |
| dc.identifier.issn | 2637-6113 | - |
| dc.identifier.issn | 2637-6113 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/210668 | - |
| dc.description.abstract | As semiconductor devices shrink to sub-7 nm, precise etching with minimal surface damage becomes crucial. This paper investigates an ultralow electron temperature (ULET) plasma atomic layer etching (ALE) process, which suppresses plasma-induced damage. The ULET plasma achieves low electron temperature and narrow ion energy distribution, allowing precise ion energy control while reducing charging and radiation damage. Postprocess surface roughness is about 3.2 nm, roughly one-fifth of that after conventional plasma etching. Furthermore, ULET plasma provides an ALE process window that is twice as wide as conventional methods, reinforcing its suitability for damage-free atomic-scale etching in semiconductor manufacturing. | - |
| dc.format.extent | 9 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | American Chemical Society | - |
| dc.title | Atomic Layer Etching of SiO2 Utilizing Ultra-Low Electron Temperature Plasma | - |
| dc.type | Article | - |
| dc.publisher.location | 미국 | - |
| dc.identifier.doi | 10.1021/acsaelm.5c00362 | - |
| dc.identifier.scopusid | 2-s2.0-105004375367 | - |
| dc.identifier.wosid | 001481917700001 | - |
| dc.identifier.bibliographicCitation | ACS Applied Electronic Materials, v.7, no.10, pp 4520 - 4528 | - |
| dc.citation.title | ACS Applied Electronic Materials | - |
| dc.citation.volume | 7 | - |
| dc.citation.number | 10 | - |
| dc.citation.startPage | 4520 | - |
| dc.citation.endPage | 4528 | - |
| dc.type.docType | Article | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalResearchArea | Materials Science | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
| dc.subject.keywordPlus | ION ENERGY-DISTRIBUTION | - |
| dc.subject.keywordPlus | BEAM GENERATED PLASMAS | - |
| dc.subject.keywordPlus | CHARGE BUILDUP | - |
| dc.subject.keywordPlus | DAMAGE | - |
| dc.subject.keywordPlus | MECHANISM | - |
| dc.subject.keywordPlus | SILICON | - |
| dc.subject.keywordPlus | BIAS | - |
| dc.subject.keywordAuthor | damage-free | - |
| dc.subject.keywordAuthor | atomic layer etch | - |
| dc.subject.keywordAuthor | plasma | - |
| dc.subject.keywordAuthor | low electron temperature | - |
| dc.subject.keywordAuthor | surface roughness | - |
| dc.subject.keywordAuthor | ionenergy distribution | - |
| dc.subject.keywordAuthor | SiO2 | - |
| dc.identifier.url | https://pubs.acs.org/doi/10.1021/acsaelm.5c00362 | - |
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