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Crystalline IGO TFTs with High Reliability under DRAM-Compatible 600 °C N2 Thermal Budgets
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Oh, Jeong Eun | - |
| dc.contributor.author | Kim, Nahyun | - |
| dc.contributor.author | Chae, Jiwon | - |
| dc.contributor.author | Cho, Min Hee | - |
| dc.contributor.author | Ha, Daewon | - |
| dc.contributor.author | Jeong, Jae Kyeong | - |
| dc.date.accessioned | 2026-06-26T05:00:13Z | - |
| dc.date.available | 2026-06-26T05:00:13Z | - |
| dc.date.issued | 2026-05 | - |
| dc.identifier.issn | 0741-3106 | - |
| dc.identifier.issn | 1558-0563 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/217624 | - |
| dc.description.abstract | High-performance crystalline IGO (c-IGO) TFTs are demonstrated for 600 ∘ C DRAM integration, where the crystalline lattice plays a critical role in preventing interfacial intermixing. In amorphous IGO TFTs, extensive Al intermixing with the adjacent Al2O3 layers inhibits channel crystallization, resulting in a degraded mobility of 25.6 cm2/Vs. Conversely, the crystalline IGO effectively suppresses Al diffusion, enabling a superior mobility of 89.9 cm2/Vs and a sharp subthreshold swing of 80 mV/decade. Furthermore, c-IGO TFT exhibits superior PBTS stability ( ΔVTH of -10 mV at 4 MV/cm, 80 ∘ C, 3600 sec), proving that channel crystallization is a robust strategy to mitigate intermixing-induced structural and electrical degradation in high-temperature DRAM fabrication processes. | - |
| dc.format.extent | 4 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
| dc.title | Crystalline IGO TFTs with High Reliability under DRAM-Compatible 600 °C N2 Thermal Budgets | - |
| dc.type | Article | - |
| dc.publisher.location | 미국 | - |
| dc.identifier.doi | 10.1109/LED.2026.3675621 | - |
| dc.identifier.scopusid | 2-s2.0-105033650026 | - |
| dc.identifier.wosid | 001756806400030 | - |
| dc.identifier.bibliographicCitation | IEEE Electron Device Letters, v.47, no.5, pp 925 - 928 | - |
| dc.citation.title | IEEE Electron Device Letters | - |
| dc.citation.volume | 47 | - |
| dc.citation.number | 5 | - |
| dc.citation.startPage | 925 | - |
| dc.citation.endPage | 928 | - |
| dc.type.docType | Article | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.subject.keywordPlus | Aluminum | - |
| dc.subject.keywordPlus | Aluminum oxide | - |
| dc.subject.keywordPlus | Budget control | - |
| dc.subject.keywordPlus | Crystalline materials | - |
| dc.subject.keywordPlus | Dynamic random access storage | - |
| dc.subject.keywordPlus | Gallium compounds | - |
| dc.subject.keywordPlus | III-V semiconductors | - |
| dc.subject.keywordPlus | Semiconducting indium | - |
| dc.subject.keywordPlus | Semiconducting indium compounds | - |
| dc.subject.keywordPlus | Thin film circuits | - |
| dc.subject.keywordAuthor | atomic layer deposition | - |
| dc.subject.keywordAuthor | crystallization | - |
| dc.subject.keywordAuthor | high thermal budget | - |
| dc.subject.keywordAuthor | indium gallium oxide | - |
| dc.subject.keywordAuthor | thin-film transistors | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/11447267 | - |
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