Cited 1 time in
Reconfigurable logic for carry-out computing in 1-bit full adder using a single magnetic tunnel junction
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Bae, Gi Yoon | - |
| dc.contributor.author | Hwang, Yechan | - |
| dc.contributor.author | Lee, Sangmin | - |
| dc.contributor.author | Kim, Taewan | - |
| dc.contributor.author | Park, Wan jun | - |
| dc.date.accessioned | 2021-07-30T04:56:11Z | - |
| dc.date.available | 2021-07-30T04:56:11Z | - |
| dc.date.created | 2021-05-12 | - |
| dc.date.issued | 2019-04 | - |
| dc.identifier.issn | 0038-1101 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/2229 | - |
| dc.description.abstract | We propose a method for reconfigurable logic using a single magnetic tunnel junction (MTJ) as the main computing element in the single-gate architecture. The introduction of the MTJ to reconfigurable computing provides advantages in layout efficiency, power consumption, and the device variation problem. In this study, we present a three-terminal MTJ implemented by two inputs (ampere magnetic field and spin torque-transfer current) acting as a logic element that performs the Boolean logic functions of NAND and NOR with corresponding programmable input values in a fixed architecture. In addition, the reconfigurable functionality is confirmed through demonstration of carry-out computing across the operator built with single-MTJ logic architecture. | - |
| dc.language | 영어 | - |
| dc.language.iso | en | - |
| dc.publisher | PERGAMON-ELSEVIER SCIENCE LTD | - |
| dc.title | Reconfigurable logic for carry-out computing in 1-bit full adder using a single magnetic tunnel junction | - |
| dc.type | Article | - |
| dc.contributor.affiliatedAuthor | Park, Wan jun | - |
| dc.identifier.doi | 10.1016/j.sse.2019.02.001 | - |
| dc.identifier.scopusid | 2-s2.0-85061335967 | - |
| dc.identifier.wosid | 000461020000004 | - |
| dc.identifier.bibliographicCitation | SOLID-STATE ELECTRONICS, v.154, pp.16 - 19 | - |
| dc.relation.isPartOf | SOLID-STATE ELECTRONICS | - |
| dc.citation.title | SOLID-STATE ELECTRONICS | - |
| dc.citation.volume | 154 | - |
| dc.citation.startPage | 16 | - |
| dc.citation.endPage | 19 | - |
| dc.type.rims | ART | - |
| dc.type.docType | Article | - |
| dc.description.journalClass | 1 | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalResearchArea | Physics | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
| dc.relation.journalWebOfScienceCategory | Physics, Condensed Matter | - |
| dc.subject.keywordPlus | Adders | - |
| dc.subject.keywordPlus | Architecture | - |
| dc.subject.keywordPlus | Carry logic | - |
| dc.subject.keywordPlus | Computation theory | - |
| dc.subject.keywordPlus | Computer circuits | - |
| dc.subject.keywordPlus | Energy efficiency | - |
| dc.subject.keywordPlus | Green computing | - |
| dc.subject.keywordPlus | Magnetism | - |
| dc.subject.keywordPlus | Reconfigurable architectures | - |
| dc.subject.keywordPlus | Reconfigurable hardware | - |
| dc.subject.keywordPlus | Tunnel junctions | - |
| dc.subject.keywordPlus | Boolean logic functions | - |
| dc.subject.keywordPlus | Computing element | - |
| dc.subject.keywordPlus | Device variations | - |
| dc.subject.keywordPlus | Logic architecture | - |
| dc.subject.keywordPlus | Magnetic tunnel junction | - |
| dc.subject.keywordPlus | Reconfigurable computing | - |
| dc.subject.keywordPlus | Reconfigurable logic | - |
| dc.subject.keywordPlus | Spin torque transfer | - |
| dc.subject.keywordPlus | Magnetic devices | - |
| dc.subject.keywordAuthor | Reconfigurable logic | - |
| dc.subject.keywordAuthor | Magnetic tunnel junction (MTJ) | - |
| dc.identifier.url | https://www.sciencedirect.com/science/article/pii/S0038110118305604?via%3Dihub | - |
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