Cited 0 time in
Parallel LDPC Decoding on a Heterogeneous Platform using OpenCL
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Hong, Jung-Hyun | - |
| dc.contributor.author | Park, Joo-Yul | - |
| dc.contributor.author | Chung, Ki-Seok | - |
| dc.date.accessioned | 2021-08-02T16:52:22Z | - |
| dc.date.available | 2021-08-02T16:52:22Z | - |
| dc.date.issued | 2016-06 | - |
| dc.identifier.issn | 1976-7277 | - |
| dc.identifier.issn | 1976-7277 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/23025 | - |
| dc.description.abstract | Modern mobile devices are equipped with various accelerated processing units to handle computationally intensive applications; therefore, Open Computing Language (OpenCL) has been proposed to fully take advantage of the computational power in heterogeneous systems. This article introduces a parallel software decoder of Low Density Parity Check (LDPC) codes on an embedded heterogeneous platform using an OpenCL framework. The LDPC code is one of the most popular and strongest error correcting codes for mobile communication systems. Each step of LDPC decoding has different parallelization characteristics. In the proposed LDPC decoder, steps suitable for task-level parallelization are executed on the multi-core central processing unit (CPU), and steps suitable for data-level parallelization are processed by the graphics processing unit (GPU). To improve the performance of OpenCL kernels for LDPC decoding operations, explicit thread scheduling, vectorization, and effective data transfer techniques are applied. The proposed LDPC decoder achieves high performance and high power efficiency by using heterogeneous multi-core processors on a unified computing framework. | - |
| dc.format.extent | 21 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | 한국인터넷정보학회 | - |
| dc.title | Parallel LDPC Decoding on a Heterogeneous Platform using OpenCL | - |
| dc.type | Article | - |
| dc.publisher.location | 대한민국 | - |
| dc.identifier.doi | 10.3837/tiis.2016.06.011 | - |
| dc.identifier.scopusid | 2-s2.0-84977109040 | - |
| dc.identifier.wosid | 000379160600011 | - |
| dc.identifier.bibliographicCitation | KSII Transactions on Internet and Information Systems, v.10, no.6, pp 2648 - 2668 | - |
| dc.citation.title | KSII Transactions on Internet and Information Systems | - |
| dc.citation.volume | 10 | - |
| dc.citation.number | 6 | - |
| dc.citation.startPage | 2648 | - |
| dc.citation.endPage | 2668 | - |
| dc.type.docType | Article | - |
| dc.identifier.kciid | ART002165316 | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.description.journalRegisteredClass | kci | - |
| dc.relation.journalResearchArea | Computer Science | - |
| dc.relation.journalResearchArea | Telecommunications | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
| dc.relation.journalWebOfScienceCategory | Telecommunications | - |
| dc.subject.keywordPlus | CODES | - |
| dc.subject.keywordAuthor | Error correcting code | - |
| dc.subject.keywordAuthor | LDPC decoder | - |
| dc.subject.keywordAuthor | parallel processing | - |
| dc.subject.keywordAuthor | heterogeneous computing | - |
| dc.subject.keywordAuthor | OpenCL | - |
| dc.identifier.url | https://www.itiis.org/digital-library/manuscript/1371 | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
222, Wangsimni-ro, Seongdong-gu, Seoul, 04763, Korea+82-2-2220-1366
COPYRIGHT © 2024 HANYANG UNIVERSITY.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.
