Practical Verifiable Computation by Using a Hardware-Based Correct Execution Environment
DC Field | Value | Language |
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dc.contributor.author | Lee, Junghee | - |
dc.contributor.author | Nicopoulos, Chrysostomos | - |
dc.contributor.author | Jeong, Gweonho | - |
dc.contributor.author | Kim, Jihye | - |
dc.contributor.author | Oh, Hyunok | - |
dc.date.accessioned | 2021-08-03T02:54:57Z | - |
dc.date.available | 2021-08-03T02:54:57Z | - |
dc.date.created | 2021-05-12 | - |
dc.date.issued | 2020-08 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/32761 | - |
dc.description.abstract | The verifiable computation paradigm has been studied extensively as a means to verifying the result of outsourced computation. In said scheme, the verifier requests computation from the prover and verifies the result by checking the output and proof received from the prover. Although they have great potential for various critical applications, verifiable computations have not been widely used in practice, because of their significant performance overhead. Existing cryptography-based approaches incur significant overhead, because a cryptography-based mathematical frame needs to be constructed, which prevents deviation from the correct computation. The proposed approach is to reduce the overhead by trusting the computing hardware platform where the computation is outsourced. If one trusts the hardware to do the computation, the hardware can take the place of the cryptographic computing frame, thereby guaranteeing correct computation. The key challenge of this approach is to define what exactly the hardware should guarantee for verifiable computation. For this, we introduce the concept of Correct Execution Environment (CEE), which guarantees instruction correctness and state preservation. We prove that these two requirements are satisfactory conditions for a correct output. By employing a CEE, the verifiable computation scheme can be simplified, and its overhead can be reduced drastically. The presented experimental results demonstrate that the execution time is approximately 1.7 million times faster and the verification time over 50 times faster than a state-of-the-art cryptographic approach. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Practical Verifiable Computation by Using a Hardware-Based Correct Execution Environment | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Oh, Hyunok | - |
dc.identifier.doi | 10.1109/ACCESS.2020.3041308 | - |
dc.identifier.scopusid | 2-s2.0-85097406386 | - |
dc.identifier.wosid | 000597206100001 | - |
dc.identifier.bibliographicCitation | IEEE ACCESS, v.8, pp.216689 - 216706 | - |
dc.relation.isPartOf | IEEE ACCESS | - |
dc.citation.title | IEEE ACCESS | - |
dc.citation.volume | 8 | - |
dc.citation.startPage | 216689 | - |
dc.citation.endPage | 216706 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | Y | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Telecommunications | - |
dc.relation.journalWebOfScienceCategory | Computer Science | - |
dc.relation.journalWebOfScienceCategory | Information Systems | - |
dc.relation.journalWebOfScienceCategory | Engineering | - |
dc.relation.journalWebOfScienceCategory | Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Telecommunications | - |
dc.subject.keywordPlus | Cryptography | - |
dc.subject.keywordPlus | Cost reduction | - |
dc.subject.keywordPlus | Computation paradigms | - |
dc.subject.keywordPlus | Computing hardware | - |
dc.subject.keywordPlus | Critical applications | - |
dc.subject.keywordPlus | Execution environments | - |
dc.subject.keywordPlus | State of the art | - |
dc.subject.keywordPlus | State preservation | - |
dc.subject.keywordAuthor | Cryptography | - |
dc.subject.keywordAuthor | Hardware | - |
dc.subject.keywordAuthor | Servers | - |
dc.subject.keywordAuthor | Blockchain | - |
dc.subject.keywordAuthor | Smart contracts | - |
dc.subject.keywordAuthor | Prototypes | - |
dc.subject.keywordAuthor | Memory management | - |
dc.subject.keywordAuthor | Verifiable computation | - |
dc.subject.keywordAuthor | cryptography | - |
dc.subject.keywordAuthor | trusted hardware | - |
dc.subject.keywordAuthor | computer architecture | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/9273052 | - |
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