Per-bank refresh with adaptive early termination for high density DRAM
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Yang, Hyun-Woong | - |
dc.contributor.author | Lee, Min-Kyu | - |
dc.contributor.author | Chung, Ki Seok | - |
dc.date.accessioned | 2021-07-30T05:24:30Z | - |
dc.date.available | 2021-07-30T05:24:30Z | - |
dc.date.created | 2021-05-13 | - |
dc.date.issued | 2018-11 | - |
dc.identifier.issn | 0000-0000 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/4655 | - |
dc.description.abstract | DRAM, which is mainly used as main memory, requires a refresh operation to maintain the integrity of stored data. Since memory read and write operations to a bank are not allowed while the bank is being refreshed, a lot of memory accesses may be blocked due to refresh, which may lead to significant performance degradation. Therefore, a lot of active studies to minimize this negative performance impact of refresh have been conducted. In a refresh scheme called per-bank refresh, the refresh unit will be one bank rather than all banks in a rank, allowing memory access to other banks while a certain bank in the same rank is refreshed. However, the per-bank refresh consumes more power than all-bank refresh. In this paper, we propose a per-bank refresh method with adaptive early termination, which allows both the refresh period and the size of each row group to be non-uniformly determined, to increase the efficiency of per-bank refresh and reduce energy consumption. By using this method, compared to the basic all-bank refresh model, the average weighted speed increases by about 6.4% and the energy consumption is reduced by about 51%. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | Association for Computing Machinery | - |
dc.title | Per-bank refresh with adaptive early termination for high density DRAM | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Chung, Ki Seok | - |
dc.identifier.doi | 10.1145/3290420.3290442 | - |
dc.identifier.scopusid | 2-s2.0-85062788242 | - |
dc.identifier.bibliographicCitation | ACM International Conference Proceeding Series, pp.169 - 173 | - |
dc.relation.isPartOf | ACM International Conference Proceeding Series | - |
dc.citation.title | ACM International Conference Proceeding Series | - |
dc.citation.startPage | 169 | - |
dc.citation.endPage | 173 | - |
dc.type.rims | ART | - |
dc.type.docType | Conference Paper | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordPlus | Energy efficiency | - |
dc.subject.keywordPlus | Energy utilization | - |
dc.subject.keywordPlus | Memory architecture | - |
dc.subject.keywordPlus | DRAM refresh | - |
dc.subject.keywordPlus | Early termination | - |
dc.subject.keywordPlus | Low Power | - |
dc.subject.keywordPlus | Performance degradation | - |
dc.subject.keywordPlus | Performance impact | - |
dc.subject.keywordPlus | Reduce energy consumption | - |
dc.subject.keywordPlus | Speed increase | - |
dc.subject.keywordPlus | Write operations | - |
dc.subject.keywordPlus | Dynamic random access storage | - |
dc.subject.keywordAuthor | DRAM refresh | - |
dc.subject.keywordAuthor | Low power DRAM | - |
dc.subject.keywordAuthor | Memory architecture | - |
dc.identifier.url | https://dl.acm.org/doi/10.1145/3290420.3290442 | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
222, Wangsimni-ro, Seongdong-gu, Seoul, 04763, Korea+82-2-2220-1365
COPYRIGHT © 2021 HANYANG UNIVERSITY.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.