Nanoscale Floating-Gate Memory using Colloidal Au Nanoparticles Electrostatically Assembled on Si Nanowires

Abstract

We report on the nanofloating-gate characteristics of colloidal Au nanoparticles electrostatically assembled on Si nanowire split-gate transistors. The one-dimensional nature of the Si nanowire may enhance the gating effect of the charge stored on the Au nanocrystals, thereby enabling memory operation at reduced floating-gate densities. E-beam lithography and dry etching was performed on a highly n-type doped (10^14 cm^-2) Si-on-insulator wafer to fabricate the self-aligned split-gate Si nanowire structures. The colloidal Au nanoparticles with ~ 10 nm diameters were assembled on the top of the oxidized Si surface by dielectrophoresis (10 Vpp, 5 MHz). The 2 minute process time is considerably lower than self-assembly methods which takes several hours, used to assemble nanoparticles on chemically functionalized surfaces. The transfer characteristics measurement results on the 50 nm Si nanowire split-gate transistor with colloidal Au nanofloating-gates shows that the depletion mode cut-off voltage shift was ~ 1.2 V demonstrating successful memory operation. The shift in the cut-off voltage increases with decrease in nanowire dimensions indicating that the 1D nature of the Si channel enhanced the nanofloating-gate charge induced carrier depletion with reduced floating-gate charge.