Improving resistance to gate bias stress in pentacene TFTs with optimally cured polymer dielectric layers
DC Field | Value | Language |
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dc.contributor.author | Hwang, DK | - |
dc.contributor.author | Park, JH | - |
dc.contributor.author | Lee, J | - |
dc.contributor.author | Choi, JM | - |
dc.contributor.author | Kim, JH | - |
dc.contributor.author | Kim, E | - |
dc.contributor.author | Im, S | - |
dc.date.accessioned | 2022-02-07T05:43:24Z | - |
dc.date.available | 2022-02-07T05:43:24Z | - |
dc.date.created | 2022-02-07 | - |
dc.date.issued | 2006 | - |
dc.identifier.issn | 0013-4651 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/24614 | - |
dc.description.abstract | We report on the insulator charging effects of poly-4-vinylphenol (PVP) gate dielectric on the reliabilities of pentacene thin-film transistors (TFTs). Our PVP films were prepared by spin coating and subsequent curing at various temperatures (155, 175, and 200 degrees C). Evaluated using Au/PVP/p(+)-Si structures, the dielectric strength of PVP films cured at 175 degrees C was superior to those of the other PVP films cured at different temperatures. Although the field mobility (similar to 0.13 cm(2)/V s) obtained from a TFT with PVP film cured at 200 S C appeared higher than that (similar to 0.07 cm(2)/V s) from the device with 175 degrees C-cured polymer film, the TFT prepared at 200 degrees S revealed a low on/off current ratio of less than 10(4) due to its high off-state current and a higher sensitivity to gate bias stress. The unreliable behavior is due to the dielectric charging caused by gate electron injection. We thus conclude that there are some optimal PVP-curing conditions to improve the reliability of pentacene TFT. (c) 2005 The Electrochemical Society. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | ELECTROCHEMICAL SOC INC | - |
dc.subject | THIN-FILM TRANSISTORS | - |
dc.subject | INTEGRATED-CIRCUITS | - |
dc.subject | HIGH-MOBILITY | - |
dc.subject | DRIVEN | - |
dc.subject | DISPLAYS | - |
dc.title | Improving resistance to gate bias stress in pentacene TFTs with optimally cured polymer dielectric layers | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, E | - |
dc.identifier.doi | 10.1149/1.2126585 | - |
dc.identifier.scopusid | 2-s2.0-33645505144 | - |
dc.identifier.wosid | 000234142400061 | - |
dc.identifier.bibliographicCitation | JOURNAL OF THE ELECTROCHEMICAL SOCIETY, v.153, no.1, pp.G23 - G26 | - |
dc.relation.isPartOf | JOURNAL OF THE ELECTROCHEMICAL SOCIETY | - |
dc.citation.title | JOURNAL OF THE ELECTROCHEMICAL SOCIETY | - |
dc.citation.volume | 153 | - |
dc.citation.number | 1 | - |
dc.citation.startPage | G23 | - |
dc.citation.endPage | G26 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Electrochemistry | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalWebOfScienceCategory | Electrochemistry | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Coatings & Films | - |
dc.subject.keywordPlus | THIN-FILM TRANSISTORS | - |
dc.subject.keywordPlus | INTEGRATED-CIRCUITS | - |
dc.subject.keywordPlus | HIGH-MOBILITY | - |
dc.subject.keywordPlus | DRIVEN | - |
dc.subject.keywordPlus | DISPLAYS | - |
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