Content-Addressable Memory System Using a Nanoelectromechanical Memory Switch
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Hyunju | - |
dc.contributor.author | Cho, Mannhee | - |
dc.contributor.author | Lee, Sanghyun | - |
dc.contributor.author | Kwon, Hyug Su | - |
dc.contributor.author | Choi, Woo Young | - |
dc.contributor.author | Kim, Youngmin | - |
dc.date.accessioned | 2022-03-18T04:40:45Z | - |
dc.date.available | 2022-03-18T04:40:45Z | - |
dc.date.created | 2022-03-18 | - |
dc.date.issued | 2022-02-01 | - |
dc.identifier.issn | 2079-9292 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/26666 | - |
dc.description.abstract | Content-addressable memory (CAM) performs a parallel search operation by comparing the search data with all content stored in memory during a single cycle, instead of finding the data using an address. Conventional CAM designs use a dynamic CMOS architecture for high matching speed and high density; however, such implementations require the use of system clocks, and thus, suffer from timing violations and design limitations, such as charge sharing. In this paper, we propose a static-based architecture for a low-power, high-speed binary CAM (BCAM) and ternary CAM (TCAM), using a nanoelectromechanical (NEM) memory switch for nonvolatile data storage. We designed the proposed CAM architectures on a 65 nm process node with a 1.2 V operating voltage. The results of the layout simulation show that the proposed design has up to 23% less propagation delay, three times less matching power, and 9.4 times less area than a conventional design. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | MDPI | - |
dc.subject | LOW-POWER | - |
dc.subject | PRECHARGE-FREE | - |
dc.subject | CAM | - |
dc.title | Content-Addressable Memory System Using a Nanoelectromechanical Memory Switch | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Youngmin | - |
dc.identifier.doi | 10.3390/electronics11030481 | - |
dc.identifier.scopusid | 2-s2.0-85124204540 | - |
dc.identifier.wosid | 000759874000001 | - |
dc.identifier.bibliographicCitation | ELECTRONICS, v.11, no.3 | - |
dc.relation.isPartOf | ELECTRONICS | - |
dc.citation.title | ELECTRONICS | - |
dc.citation.volume | 11 | - |
dc.citation.number | 3 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | LOW-POWER | - |
dc.subject.keywordPlus | PRECHARGE-FREE | - |
dc.subject.keywordPlus | CAM | - |
dc.subject.keywordAuthor | content addressable memory (CAM) | - |
dc.subject.keywordAuthor | binary CAM | - |
dc.subject.keywordAuthor | BCAM | - |
dc.subject.keywordAuthor | ternary CAM | - |
dc.subject.keywordAuthor | TCAM | - |
dc.subject.keywordAuthor | nanoelectromechanical (NEM) | - |
dc.subject.keywordAuthor | NEM memory switch | - |
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