A fault-tolerant hierarchical diagnostic network for massively parallel processing systems
- Authors
- Choi, Y.-H.; Kim, Y.-S.
- Issue Date
- 1998
- Publisher
- Elsevier Ltd
- Keywords
- Diagnostic network; Fault tolerance; Massively parallel processors; VLSI
- Citation
- Computers and Electrical Engineering, v.24, no.5, pp.349 - 361
- Journal Title
- Computers and Electrical Engineering
- Volume
- 24
- Number
- 5
- Start Page
- 349
- End Page
- 361
- URI
- https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/27766
- DOI
- 10.1016/S0045-7906(98)00007-X
- ISSN
- 0045-7906
- Abstract
- Massively parallel processing systems consist of a large number of processing nodes to provide high performance primarily for data-intensive applications. In a system of such dimensions, high availability cannot be achieved without relying on redundancy and reconfiguration. An important aspect of highly available design is rapid diagnosis and graceful degradation in the event of failures. This paper presents a hierarchical diagnostic network for locating faults in parallel processor systems comprised of a large number of identical processing nodes. In the case of a single fault, the network can locate the fault at the time it is detected. Even in the case of multiple faults, it can significantly reduce the test time as compared to the well-known binary search. Unlike the existing self-diagnostic circuits, the diagnostic network requires small hardware overhead and may tolerate a fault in the network itself. © 1998 Elsevier Science Ltd. All rights reserved.
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