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Accelerating Random Network Coding using 512-bit SIMD Instructions
- Authors
- Shin, Seo-Ran; Choo, Se-Yeon; Park, Joon-Sang
- Issue Date
- 2019
- Publisher
- IEEE
- Keywords
- Network Coding; Single Instruction Multiple Data; Advanced Vector eXtensions; Parallelism
- Citation
- 2019 10TH INTERNATIONAL CONFERENCE ON INFORMATION AND COMMUNICATION TECHNOLOGY CONVERGENCE (ICTC): ICT CONVERGENCE LEADING THE AUTONOMOUS FUTURE, pp.1099 - 1103
- Start Page
- 1099
- End Page
- 1103
- ISSN
- 2162-1233
- Abstract
- Random network coding (RNC) can be used to increase bandwidth, to reduce delay, and to improve reliability of networked systems. This paper presents experimental results on various Single Instruction Multiple Data (SIMD) instruction sets used to increase the operation speed of Galois field arithmetic in the encoding/decoding process of random network coding. The decoding performances of RNC using 512-bit, 256-bit and 128-bit wide SIMD instruction sets are compared to show how much improvement can be achieved with the SIMD instruction set width when the generation size, the block size, and the number of threads are varied. According to our results, a RNC decoder with 512-bit SIMD shows approximately 58% and 26%, higher throughput compared to those with 128-bit and 256-bit SIMD, respectively.
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Related Researcher
- Park, Joon Sang
- Engineering (Department of Computer Engineering)