A High-Resolution Wide-Range Dual-Loop Digital Delay-Locked Loop Using a Hybrid Search Algorithm
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Han, Sangwoo | - |
dc.contributor.author | Kim, Jongsun | - |
dc.date.accessioned | 2022-06-23T01:40:52Z | - |
dc.date.available | 2022-06-23T01:40:52Z | - |
dc.date.created | 2022-06-23 | - |
dc.date.issued | 2012 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/29639 | - |
dc.description.abstract | This paper presents a dual-loop digital delay-locked loop (DLL) for high-speed DRAM applications. The dual-loop architecture using a hybrid (binary + sequential) search algorithm is proposed to achieve both wide-range operation and high delay resolution while maintaining the closed-loop property that allows for tracking of PVT variations. A new phas-einterpolation range selector (PIRS) and a variable successive approximation register (VSAR) algorithm are adopted to resolve the boundary switching and harmonic locking problems of conventional digital DLLs. The proposed digital DLL, implemented in a 0.18-mu m CMOS process, occupies an active area of only 0.19mm(2) and operates over a wide frequency range of 0.15-1.5 GHz. The DLL also dissipates a power of 11.3 mW from a 1.8 V supply at 1 GHz. The measured peak-to-peak output clock jitter is 24 ps with an input clock jitter of 7.5 ps at 1.5 GHz. The delay resolution is only 2.2 ps. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE | - |
dc.subject | MIXED-MODE DLL | - |
dc.title | A High-Resolution Wide-Range Dual-Loop Digital Delay-Locked Loop Using a Hybrid Search Algorithm | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Jongsun | - |
dc.identifier.wosid | 000392841900074 | - |
dc.identifier.bibliographicCitation | 2012 IEEE ASIAN SOLID STATE CIRCUITS CONFERENCE (A-SSCC), pp.293 - 296 | - |
dc.relation.isPartOf | 2012 IEEE ASIAN SOLID STATE CIRCUITS CONFERENCE (A-SSCC) | - |
dc.citation.title | 2012 IEEE ASIAN SOLID STATE CIRCUITS CONFERENCE (A-SSCC) | - |
dc.citation.startPage | 293 | - |
dc.citation.endPage | 296 | - |
dc.type.rims | ART | - |
dc.type.docType | Proceedings Paper | - |
dc.description.journalClass | 3 | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Theory & Methods | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | MIXED-MODE DLL | - |
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