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A two-level redundancy scheme for enhancing scalability of molecular-based crossbar memories

Authors
Choi, YHLee, MHKim, YK
Issue Date
2004
Publisher
IEEE
Keywords
molecular electronics; crossbar; scalable memory; defect tolerance; redundancy
Citation
2004 4TH IEEE CONFERENCE ON NANOTECHNOLOGY, pp.505 - 508
Journal Title
2004 4TH IEEE CONFERENCE ON NANOTECHNOLOGY
Start Page
505
End Page
508
URI
https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/30064
Abstract
This paper presents a two-level redundancy scheme for enhancing scalability of molecular-based crossbar memories. It is based on multiple molecular memory modules with spares and address translation to cope with the expected high rate of defects in chemically fabricated nanocircuits. Molecular crossbars on top of a silicon-based die providing address translation will demonstrate a notable improvement in scalability of defect-prone molecular memories.
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