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p-GaN/AlGaN/GaN E-mode FET 제작을 위한 선택적 GaN 식각 공정 개발

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dc.contributor.author장원호-
dc.contributor.author차호영-
dc.date.available2020-07-10T02:35:01Z-
dc.date.created2020-07-06-
dc.date.issued2020-
dc.identifier.issn2234-4772-
dc.identifier.urihttps://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/696-
dc.description.abstractIn this work, we developed a selective etching process for GaN that is a key process in p-GaN/AlGaN/GaN enhancement-mode (E-mode) power switching field-effect transistor (FET) fabrication. In order to achieve a high current density of p-GaN/AlGaN/GaN E-mode FET, the p-GaN layer beside the gate region must be selectively etched whereas the underneath AlGaN layer should be maintained. A selective etching process was implemented by oxidizing the surface of the AlGaN layer and the GaN layer by adding O2 gas to Cl2/N2 gas which is generally used for GaN etching. A selective etching process was optimized using Cl2/N2/O2 gas mixture and a high selectivity of 53:1 (= GaN/AlGaN) was achieved.-
dc.language영어-
dc.language.isoen-
dc.publisher한국정보통신학회-
dc.titlep-GaN/AlGaN/GaN E-mode FET 제작을 위한 선택적 GaN 식각 공정 개발-
dc.title.alternativeDevelopment of Selective GaN etching Process for p-GaN/AlGaN/GaN E-mode FET Fabrication-
dc.typeArticle-
dc.contributor.affiliatedAuthor차호영-
dc.identifier.doi10.6109/jkiice.2020.24.2.321-
dc.identifier.bibliographicCitation한국정보통신학회논문지, v.24, no.2, pp.321 - 324-
dc.relation.isPartOf한국정보통신학회논문지-
dc.citation.title한국정보통신학회논문지-
dc.citation.volume24-
dc.citation.number2-
dc.citation.startPage321-
dc.citation.endPage324-
dc.type.rimsART-
dc.identifier.kciidART002560763-
dc.description.journalClass2-
dc.description.journalRegisteredClasskci-
dc.subject.keywordAuthorEnhancement-mode-
dc.subject.keywordAuthorGaN-
dc.subject.keywordAuthorp-GaN-
dc.subject.keywordAuthorSelective etching-
dc.subject.keywordAuthorFET-
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