Detailed Information

Cited 0 time in webofscience Cited 0 time in scopus
Metadata Downloads

다중 위상 지연 고정 루프를 위한 하모닉 락 방지 회로An anti-harmonic lock circuit for multi-phase delay-locked loop

Alternative Title
An anti-harmonic lock circuit for multi-phase delay-locked loop
Authors
Jang, Young-chan
Issue Date
3-May-2013
Publisher
대한전자공학회 SoC 설계 연구회
Citation
2013 SoC 학술대회, v.1, no.1, pp.67-69
URI
https://scholarworks.bwise.kr/kumoh/handle/2020.sw.kumoh/10145
Conference Name
2013 SoC 학술대회
Place
KO
경북대학교 글로벌플라자 효석홀
Files in This Item
There are no files associated with this item.
Appears in
Collections
School of Electronic Engineering > 2. Conference Papers

qrcode

Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.

Related Researcher

Researcher JANG, YOUNG CHAN photo

JANG, YOUNG CHAN
College of Engineering (School of Electronic Engineering)
Read more

Altmetrics

Total Views & Downloads

BROWSE