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A Fully Parallel, High-speed BPC Hardware Architecture for the EBCOT in JPEG 2000A Fully Parallel, High-speed BPC Hardware Architecture for the EBCOT in JPEG 2000

Other Titles
A Fully Parallel, High-speed BPC Hardware Architecture for the EBCOT in JPEG 2000
Authors
LEE, YONGHWAN
Issue Date
Dec-2010
Publisher
Springer
Citation
Communication and Networking (Communications in Computer and Information Science, CCIS), v.120, no.2, pp 343 - 346
Pages
4
Journal Title
Communication and Networking (Communications in Computer and Information Science, CCIS)
Volume
120
Number
2
Start Page
343
End Page
346
URI
https://scholarworks.bwise.kr/kumoh/handle/2020.sw.kumoh/24606
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