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바이폴라 집적회로 레이아웃 설계 검증자동화 구현에 관한 연구On the Implementation of automatic verification for the Vipolar Integrated Circuit Layout Design
- Other Titles
- On the Implementation of automatic verification for the Vipolar Integrated Circuit Layout Design
- Authors
- 김시관
- Issue Date
- Dec-2005
- Publisher
- 금오공대산학협력단
- Citation
- 산업기술개발연구, v.21, pp 143 - 157
- Pages
- 15
- Journal Title
- 산업기술개발연구
- Volume
- 21
- Start Page
- 143
- End Page
- 157
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Collections - Department of Computer Software Engineering > 1. Journal Articles
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