Fault-Tolerant Architecture for Reliable Integrated Gate Drivers

Abstract

This paper proposes fault-tolerant (FT) architecture for integrated gate drivers. It can automatically detect faults in the gate driver caused by external physical stress and then immediately repair them as well. As a result, it can contribute to highly reliable display products. The proposed architecture uses redundant circuit structure with fault detection circuit. The detailed algorithm for the proposed method is presented in this paper. Simulation and measurement results verify that the proposed circuit and its driving algorithm operates successfully. Finally, the display system architecture is also suggested for realization of our FT method.