Design of Interface IP for Automotive I/O Control on SoC FPGA

Abstract

In order to control various input/output devices of automobiles, we simultaneously design interface IP H/W and driving S/W on Zynq SoC FPGA, which combines MCU and FPGA, to be advantageous in terms of noise, heat generation, and speed. To control analog and digital input/output data for automobile control at high speed, each of ADC, DAC, and DI/O is made into IP, and the user controls it using ARM programming through AXI bus. For verification, the chips mounted on the control board were modeled and the designed IP was connected and simulated. After connecting the control board and the Zynq board together, the desired operation was ensured by checking the register map of the PS area and measuring the actual waveform using an oscilloscope. It was confirmed that the maximum error rate between the input ADC data and the calculated data was 0 to 0.65 percent depending on the voltage level. The DAC's output data showed that most signals met the standard level of output, and at high voltage levels, an error rate of up to 1.67% was observed.