First-order Continuous Time Delta-sigma Modulator with 3-bit SAR ADC and PNM DAC

Abstract

A small area and high resolution 3-bit first-order continuous time (CT) delta-sigma modulator (DSM) using a pulse number modulation (PNM) digital-to-analog converter (DAC) is proposed for sensor interface applications. A 3-bit quantizer for the CT DSM is implemented using a successive approximation register (SAR) ADC, and a PNM DAC is proposed to minimize mismatches of a 3-bit DAC. It is designed using a 180-nm CMOS process with a supply of 1.8 V. The simulated SNDR of the designed first-order CT DSM is about 104.00 dB for an input signal with a frequency of 100.259 Hz at an over sampling ratio of 1024. The area and power consumption are 0.0918mm(2) and 603.2 mu W, respectively.