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Cited 58 time in webofscience Cited 78 time in scopus
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Threshold voltage and subthreshold slope of multiple-gate SOI MOSFETs

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dc.contributor.authorColinge, JP-
dc.contributor.authorPark, JW-
dc.contributor.authorXiong, W-
dc.date.available2020-04-24T14:26:21Z-
dc.date.created2020-03-31-
dc.date.issued2003-08-
dc.identifier.issn0741-3106-
dc.identifier.urihttps://scholarworks.bwise.kr/kumoh/handle/2020.sw.kumoh/3475-
dc.description.abstractThe subthreshold swing and threshold voltage characteristics of multiple-gate SOI transistors have been numerically simulated. These devices behave like cylindrical, surrounding gate devices, with the exception of the corner inversion effect. The corner inversion effect is, however, shown to be negligible if the devices are fully depleted devices or if the gate insulator thickness is small enough.-
dc.language영어-
dc.language.isoen-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectMODEL-
dc.titleThreshold voltage and subthreshold slope of multiple-gate SOI MOSFETs-
dc.typeArticle-
dc.contributor.affiliatedAuthorPark, JW-
dc.identifier.doi10.1109/LED.2003.815153-
dc.identifier.scopusid2-s2.0-0042888776-
dc.identifier.wosid000184514400007-
dc.identifier.bibliographicCitationIEEE ELECTRON DEVICE LETTERS, v.24, no.8, pp.515 - 517-
dc.citation.titleIEEE ELECTRON DEVICE LETTERS-
dc.citation.volume24-
dc.citation.number8-
dc.citation.startPage515-
dc.citation.endPage517-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.subject.keywordPlusMODEL-
dc.subject.keywordAuthorinsulated gate FETs-
dc.subject.keywordAuthorMOS devices-
dc.subject.keywordAuthorsemiconductor device modeling-
dc.subject.keywordAuthorSOI technology-
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