RFID 태그 칩 구동을 위한 새로운 고효율 CMOS 달링턴쌍형 브리지 정류기

Abstract

In this paper, a new high-efficiency CMOS bridge rectifier for driving RFID tag chips is designed and analyzed. The input stage of the proposed rectifier is designed as a cascade structure connected with two NMOSs for reducing the gate capacitance by circuitry method, which is the main path of the leakage current that is increased when the operating frequency is increased. This gate capacitance reduction technique using the cascade input stage for reducing the gate leakage current is presented theoretically. The output characteristics of the proposed rectifier are derived analytically using its high frequency small-signal equivalent circuit. For the general load resistance of 50㏀, the proposed rectifier shows better power conversion efficiencies of 28.9% for 915㎒ UHF (for ISO 18000 -6) and 15.3% for 2.45㎓ microwave (for ISO 18000-4) than those of 26.3% and 26.8% for 915㎒, and 13.2% and 12.6% for 2.45㎓ of compared other two existing rectifiers. Therefore, the proposed rectifier may be used as a general purpose rectifier to drive tag chips for various RFID systems.