Electrothermal Modeling of Multi-Nanosheet FETs With Various Layouts
- Authors
- Kwon, Wookyung; Yoo, Changhyun; Jeon, Jongwook
- Issue Date
- 19-Feb-2024
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- Thermal resistance; Integrated circuit modeling; Resistance; Analytical models; Temperature distribution; Thermal analysis; Boundary conditions; Multifinger (MF); multi-lateral-stack; multinanosheet FET (mNS-FET); self-heating effect (SHE); thermal resistance ( R-th)
- Citation
- IEEE TRANSACTIONS ON ELECTRON DEVICES, v.71, no.4, pp 1 - 6
- Pages
- 6
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE TRANSACTIONS ON ELECTRON DEVICES
- Volume
- 71
- Number
- 4
- Start Page
- 1
- End Page
- 6
- URI
- https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/110212
- DOI
- 10.1109/TED.2024.3365077
- ISSN
- 0018-9383
1557-9646
- Abstract
- In this study, we propose a highly accurate and rapidly analyzable electrothermal modeling for the observed self-heating effect (SHE) characteristics in multinanosheet FETs (mNS-FETs) anticipated for use after FinFET. This modeling aims to provide a comprehensive understanding of the SHE in mNS-FETs. In particular, thermal resistance model capable of accurately depicting the thermal profile of mNS-FETs with not only a single structure but also those with multistack (MS) and multifinger (MF) configurations, analyzing their self-heating characteristics, for the first time. The model considers variations in self-heating behavior based on the introduction of a bottom-isolation process, which can reduce leakage current. Electrothermal model constructed with this thermal resistance network accurately captures the lattice temperature distribution within the device due to SHE, allowing for precise depiction on circuit simulators. This capability can enhance the accuracy of reliability analysis for mNS-FET devices during circuit operation, demonstrating its potential utility in assessing the reliability of the components. We propose a thermal resistance formula model suitable for MS and MF configurations of mNS-FETs to be incorporated into the industry-standard SPICE model used for circuit simulations. This provides an accurate modeling methodology for circuit design, ensuring that the thermal characteristics of mNS-FETs with MS and MF structures are appropriately represented in the SPICE model for reliable circuit simulations.
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Collections - Information and Communication Engineering > School of Electronic and Electrical Engineering > 1. Journal Articles
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