A 23.9-μW 13.6-Bit Period Modulation-Based Capacitance-to-Digital Converter With Dynamic Current Mirror Front-End
- Authors
- Lee, Hyeyeon; Seo, Donguk; Woo, Jin; Lee, Yoonmyung; Lee, Inhee; Chae, Youngcheol
- Issue Date
- 2024
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- Capacitance; Capacitance-to-digital converter (CDC); Current mirrors; dynamic current mirror (DCM); high precision; low power; period modulation (PM); Thermal noise; Transconductance; Transistors; Voltage; Voltage measurement
- Citation
- IEEE Solid-State Circuits Letters, v.7, pp 1 - 1
- Pages
- 1
- Indexed
- SCOPUS
ESCI
- Journal Title
- IEEE Solid-State Circuits Letters
- Volume
- 7
- Start Page
- 1
- End Page
- 1
- URI
- https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/110607
- DOI
- 10.1109/LSSC.2024.3382813
- ISSN
- 2573-9603
2573-9603
- Abstract
- This letter proposes a low-power high-precision capacitance-to-digital converter (CDC) utilizing a dynamic current mirror (DCM) to transform a sensor input capacitance (CIN) into an output current. The resulting current is directly proportional to the ratio of CIN to an internal reference capacitor (CREF) and subsequently converted into a period-modulated output, facilitating simple digitization by a digital counter. The CDC achieves an extensive CIN range of 1 to 68 pF without the need for a power-hungry reference buffer. Fabricated in a 65-nm CMOS process, the prototype IC occupies a small area of 0.05-mm2 and consumes only 23.9 μW even with a CIN of 47 pF. It achieves a capacitance resolution of 1.65 fF for a CIN of 1 pF with a conversion time of 4 ms, corresponding to a 13.6-bit ENOB. IEEE
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- Appears in
Collections - Information and Communication Engineering > Department of Semiconductor Systems Engineering > 1. Journal Articles
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