A 16x16 programmable anlaog vector matrix multiplier using CMOS compatible Floating gate device
- Authors
- Kim, Y.-H.[Kim, Y.-H.]; Choi, J.-M.[Choi, J.-M.]; Woo, J.-J.[Woo, J.-J.]; Park, E.-J.[Park, E.-J.]; Kim, S.-W.[Kim, S.-W.]; Kwon, K.-W.[Kwon, K.-W.]
- Issue Date
- 2019
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- 16x16 array; Analog VMM; Nonvolatile; Weight
- Citation
- ICEIC 2019 - International Conference on Electronics, Information, and Communication
- Journal Title
- ICEIC 2019 - International Conference on Electronics, Information, and Communication
- URI
- https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/15309
- DOI
- 10.23919/ELINFOCOM.2019.8706488
- ISSN
- 0000-0000
- Abstract
- This paper presents, a 16 x 16 programmable analog vector matrix multiplier (VMM) with CMOS compatible floating gate device that used as nonvolatile storage for the weight matrix values. Each weight matrix value is stored in single-poly floating gate, changes p-type MOSFET gate voltage. Current summation method is used for sum of vector calculation, that correlation between input and weight. The vector matrix multiplier simulated based on 180-nm CMOS fabrication successfully. © 2019 Institute of Electronics and Information Engineers (IEIE).
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- Appears in
Collections - Information and Communication Engineering > Department of Semiconductor Systems Engineering > 1. Journal Articles
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