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Cited 10 time in webofscience Cited 9 time in scopus
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Novel Approach for the Reduction of Leakage Current Characteristics of 20 nm DRAM Capacitors With ZrO2-Based High-k Dielectrics

Authors
Lee, JM[Lee, Jong-Min]Park, DS[Park, Dong-Sik]Yew, SC[Yew, Seung-chul]Shin, SH[Shin, Soo-Ho]Noh, JY[Noh, Jun-Yong]Kim, HS[Kim, Hyoung-Sub]Choi, BD[Choi, Byoung-Deog]
Issue Date
Nov-2017
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Capacitors; dielectric films; DRAM chips; leakage currents; memory architecture
Citation
IEEE ELECTRON DEVICE LETTERS, v.38, no.11, pp.1524 - 1527
Indexed
SCIE
SCOPUS
Journal Title
IEEE ELECTRON DEVICE LETTERS
Volume
38
Number
11
Start Page
1524
End Page
1527
URI
https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/26652
DOI
10.1109/LED.2017.2755050
ISSN
0741-3106
Abstract
In order to produce a dynamic random access memory (DRAM) of 20 nm or less, the most important concern regarding development is to reduce the leakage current degradation of the capacitor using high-k dielectrics. We studied the effect of defect sources present after the formationof the capacitorandmeasuredthe leakage current characteristics of the capacitor using the dielectric breakdown degradation test, a test used in mass production. From these results, we confirmed that the leakage current degradation was completely eliminated by removing external impurities of boron and hydrogenwithout any change in the structure ormaterials of the capacitor. For furtherDRAM scaling, we propose a method of reducing leakage current degradation of the capacitor.
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