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Cited 24 time in webofscience Cited 23 time in scopus
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Enhanced electrical properties of oxide semiconductor thin-film transistors with high conductivity thin layer insertion for the channel region

Authors
Nguyen, C.P.T.[Nguyen, C.P.T.]Raja, J.[Raja, J.]Kim, S.[Kim, S.]Jang, K.[Jang, K.]Le, A.H.T.[Le, A.H.T.]Lee, Y.-J.[Lee, Y.-J.]Yi, J.[Yi, J.]
Issue Date
28-Feb-2017
Publisher
ELSEVIER SCIENCE BV
Citation
APPLIED SURFACE SCIENCE, v.396, pp.1472 - 1477
Indexed
SCIE
SCOPUS
Journal Title
APPLIED SURFACE SCIENCE
Volume
396
Start Page
1472
End Page
1477
URI
https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/30035
DOI
10.1016/j.apsusc.2016.11.194
ISSN
0169-4332
Abstract
This study examined the performance and the stability of indium tin zinc oxide (ITZO) thin film transistors (TFTs) by inserting an ultra -thin indium tin oxide (ITO) layer at the active/insulator interface. The electrical properties of the double channel device (ITO thickness of 5 nm) were improved in comparison with the single channel ITZO or ITO devices. The TFT characteristics of the device with an ITO thickness of less than 5 rim were degraded due to the formation of an island -like morphology and the carriers scattering at the active/insulator interface. The 5 nm-thick ITO inserted ITZO TFTs (optimal condition) exhibited a superior field effect mobility (similar to 95 cm(2)/V.s) compared with the ITZO-only TFTs (similar to 34 cm(2)/V.s). The best characteristics of the TFT devices with double channel layer are due to the lowest surface roughness (0.14nm) and contact angle (50.1 degrees) that result in the highest hydrophicility, and the most effective adhesion at the surface. Furthermore, the threshold voltage shifts for the ITO/ITZO double layer device decreased to 0.80 and -2.39 V compared with 6.10 and -6.79 V (for the ITZO only device) under positive and negative bias stress, respectively. The falling rates of EA were 0.38 eV/V and 0.54 eV/V for the ITZO and ITO/ITZO bi-layer devices, respectively. The faster falling rate of the double channel devices suggests that the trap density, including interface trap and semiconductor bulk trap, can be decreased by the ion insertion of a very thin ITO film into the ITZO/SiO2 reference device. These results demonstrate that the double active layer TFT can potentially be applied to the flat panel display. (C) 2016 Elsevier B.V. All rights reserved.
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