An advanced SLC-buffering for TLC NAND flash-based storage

Abstract

In recent years, almost all consumer devices adopt NAND flash storage as their main storage, and the performance and capacity requirements for the storage components are increasing. To meet the requirements, many researchers and manufacturers have focused on combined SLC-TLC storage, which consists of high-speed single-level cell (SLC) and high-density triple-level cell (TLC) memory. In this paper, we re-design the internal structure of the combined SLC-TLC storage to improve its performance and lifetime. We also add new behavior by employing the I/O characteristics of the file system journaling to efficiently manage the SLC region inside the storage. We implemented our scheme on a real storage platform and compared its performance with those of the conventional techniques. The results of our evaluation show that our scheme improves the storage performance by up to 65% relative to the conventional techniques. © 2017 IEEE.